14.8.183 DFMPCA
This component is supported by Accelerator family.
- Function: D-Type Flip-Flop with 2-input Multiplexed Data, rising-edge triggered Clock, and active-low Preset and Clear
- Input: CLK, A, B, S, E, PRE, CLR
- Output: Q
| CLR | PRE | S | CLK | Qn+1 |
|---|---|---|---|---|
| 0 | X | X | X | 0 |
| 1 | 0 | X | X | 1 |
| 1 | 1 | 0 | ↑ | A |
| 1 | 1 | 1 | ↑ | B |
| Family | Seq | Comb |
|---|---|---|
| All listed | 1 | — |